Prof. Harpreet Sing Jattana is the Former - Scientist/Engineer ‘G’ & Group Director – Design & Process Grp SCL- ISRO, Dept of Space, Govt of India.
He has over 27 years of experience which includes industrial, administrative as well as academic. He is associated as an adjunct and visiting professor, with various universities pan India.
Graduated in 1984 with B.E (HONS) in Electrical and Electronics Engineering from BITS Pilani, completed MBA in Operations Research & Marketing from IGNOU in 2002 and is currently pursuing PhD in Microelectronics from IIT Roorkee since 2019.
Prof. Jattana has held various conferences and workshops on topics like Chip Design, Digital Design and Methodology, Analog VLSI Design, FPGA and Digital Design, Mixed signal design, Chip Fabrication and Process flow, VLSI design Techniques & Methodology, to name a few. He is invited as a keynote speaker in many conferences.
MBA (Operations Research & Marketing)
B.E (HONS) (Electrical and Electronics Engineering)
Journal Papers Published: 18
Technical papers in “Compendium of Research work “(ISRO): 21
Areas of Interest :
- Electronics Engineering & Semiconductors
- CMOS Process development and Manufacturing
- Teaching and Research
- RadHard (SOI-CMOS) Process development
- Bipolar Process development
- HV LDMOS Process development
- Process enhancements, device reliability
- Device characterization
- Analog IC Design
- High performance Data converters design for strategic applications
- Low power digital design
- Charge coupled devices CCD, CIS, Imaging devices
- Compound Semiconductors (III – V)
- Systems design & manufacturing
- Project Execution and Management
- Manpower and Resource management
- Materials management & Budgeting